This simulator solves a balanced radial source-transformer-feeder system — a 69 kV source feeding a 25 MVA transformer down to a 13.8 kV bus and out through a distribution feeder to a constant real/reactive-power load. Adjust the source voltage, load, transformer tap and feeder impedance, and watch how voltage drop, current and losses respond.
• A real-time 3D power-flow path — 69 kV source, feeder breaker, 25 MVA transformer, 13.8 kV bus, distribution feeder and constant-P/Q load — with camera home view, focus-selected-part, toggleable enclosure, auto-rotate, expand and tap-to-inspect components. • Seven live controls: primary line voltage (60–75 kV), load real power (1–40 MW), load reactive power (−20 to 30 Mvar), HV winding tap steps (±8, at 1.25% per step), feeder resistance per phase (0–1 Ω), feeder reactance per phase (0–2 Ω), and a feeder-breaker-closed checkbox. • Play/pause, single step, larger step, and 0.1×/1×/10×/60× playback speed. • A Voltage & losses analysis tab with two live charts, the underlying algebraic model equations, and snapshot measurements. • A Test & diagnose style Experiments tab with five guided experiments, an independent model-verification bench, and a timestamped event log with a copyable trial report. • A Learn & assess tab with guided lessons, a knowledge-check quiz and a written scope statement with a reference link. • Live metrics for receiving/no-load LV voltage, feeder current, source real power, series-plus-core loss, real-power efficiency, and source MVA as a percentage of the 25 MVA rating.
The transformer is modeled as an ideal 69/13.8 kV turns ratio in series with a 6% impedance at X/R = 10 referred to the low-voltage side, plus a fixed 30 kW core loss. The feeder is a series R + jX per phase. Given the source voltage and a constant real/reactive-power load at the receiving end, the simulator solves the balanced radial power-flow equation algebraically for receiving voltage, then derives current, source input power and total loss from that solution — it does not run an iterative numerical power-flow solver.
Because the load is constant-power rather than constant-impedance, a lower receiving voltage forces higher current to deliver the same power, which increases I²R loss and can further depress voltage. HV tap steps change the effective turns ratio: raising HV turns lowers the ideal secondary voltage for the same primary source voltage, which is why the sign of the tap's effect can surprise students expecting a tap to simply "boost" voltage.
The solver finds the high-voltage branch of a quadratic in receiving voltage squared; that branch exists only when its discriminant is non-negative and the corresponding coefficient is positive. Push the load, tap and feeder impedance far enough — the built-in experiment uses 40 MW / 30 Mvar through a 1+j2 Ω feeder — and the simulator can report no solution rather than fabricating a delivered voltage, which is an algebraic feasibility result rather than a dynamic voltage-collapse simulation.
This is an exact algebraic solution for one balanced constant-P/Q radial equivalent with fixed series parameters and a fixed core loss. It does not model phase unbalance, network meshing beyond this single radial path, load dynamics, magnetizing reactive current, or the time delay of an automatic voltage-control scheme.
It models an ideal 69/13.8 kV transformer turns ratio with a 6% series impedance at X/R = 10 and a fixed 30 kW core loss, followed by a series R+jX feeder to a constant real/reactive-power load. Given the source voltage and load, it solves the balanced radial power-flow equation algebraically for the high-voltage branch of receiving voltage, then derives feeder current, source input power and total loss directly from that closed-form solution.
The transformer is modeled as an ideal turns ratio. Increasing HV winding turns for a fixed primary source voltage increases the effective turns ratio, and because secondary voltage is inversely proportional to that ratio for a fixed primary voltage, more HV turns produces a lower LV-side voltage rather than a higher one.
The load is modeled as constant real and reactive power, not constant impedance. If receiving voltage falls, the feeder must carry more current to deliver the same power, and since resistive loss scales with current squared, that higher current increases I²R loss and can further depress the voltage.
The receiving-voltage solution comes from the high-voltage branch of a quadratic equation, which only exists when its discriminant is non-negative and a related coefficient is positive. Extreme combinations of heavy load and feeder impedance can push the system outside that feasible domain, and rather than fabricate a delivered voltage, the simulator explicitly reports no solution — an algebraic feasibility result, not a simulated voltage collapse.