Why a chip still burns power even when it's not switching.
Ask most people what makes a chip consume power and they'll describe something like computation — gates flipping, signals toggling, work happening. That's real, and it's the power most people intuitively picture. But it's only half the story, and in modern advanced process nodes it isn't even the bigger half anymore. A CMOS chip sitting completely idle, with no gates switching at all, still draws real, non-zero power — purely from being powered on. CMOS power splits cleanly into two physically distinct mechanisms: dynamic power, consumed only during a switching transition, and static (leakage) power, consumed continuously regardless of switching activity. Confusing the two — or assuming the second one is negligible — is exactly what leads engineers astray when a design that looks efficient on paper runs hot and drains a battery while doing nothing at all.