Why a tiny feedback capacitor can wreck your amplifier's high-frequency response.
Every inverting voltage amplifier — a common-source MOSFET stage, a common-emitter BJT stage, an inverting op-amp — has a small capacitance connecting its output back to its input. Sometimes it's an unavoidable parasitic (the gate-drain capacitance Cgd of a MOSFET, the base-collector capacitance Cbc of a BJT); sometimes it's deliberately added. Either way, a capacitance of just a few picofarads sounds too small to matter. It isn't. Because the amplifier inverts and amplifies the voltage across that capacitor, the capacitor has to do far more work than its tiny physical size suggests — and from the input's point of view, it behaves as if it were dramatically larger.
An ordinary capacitor only has to charge and discharge against the voltage change on one side, with the other side held still. The feedback capacitor Cf bridging an inverting amplifier's input and output isn't so lucky. When the input moves up by a small voltage ΔVin, the output — being inverted and amplified — moves down by |Av|·ΔVin at the same time. The total voltage swing Cf actually has to charge across is the difference between those two ends: ΔVin − (−|Av|·ΔVin) = ΔVin·(1 + |Av|). The capacitor is the same few picofarads it always was; it just has to move (1 + |Av|) times more charge for the same ΔVin at the input, because its far terminal is swinging hard in the opposite direction. Drawn purely from the input node's perspective, that behaves exactly like a single, much larger capacitor to ground — the Miller effect.
Whatever is driving the amplifier's input — a signal source, a previous stage's output resistance — has some source resistance Rs. That Rs, combined with the Miller-multiplied capacitance sitting at the input, forms an ordinary single-pole low-pass filter with cutoff frequency fc = 1/(2π·Rs·C_miller). Because C_miller grows with the stage's own voltage gain, a stage built for high gain ends up with a lower high-frequency cutoff purely from Miller multiplication of the exact same small parasitic capacitance — gain and bandwidth trade against each other even before any deliberate compensation is added. This is exactly why high-frequency amplifier designs so often reach for a cascodeconfiguration: stacking a common-gate (or common-base) stage on top of the input transistor holds the voltage gain seen directly across that transistor's own Cgd or Cbc to close to unity, even though the two-stage cascode as a whole still delivers the full gain further downstream. With the local gain across the Miller capacitor pinned near 1, the multiplication factor collapses from (1+|Av|) to roughly 2 — and the bandwidth-robbing effect all but disappears.
C_miller ≈ Cf·(1+|Av|) isn't a special rule about capacitors — it falls straight out of Q = C·V. The charge Cf must move for a given input step is set by the total voltage swing across its two terminals, and because the far terminal (the output) swings |Av| times larger and in the opposite direction, that total swing is (1+|Av|) times the input step alone. A cascode stage attacks this at the source: by holding the drain (or collector) of the input transistor at a nearly fixed voltage — via the low input impedance of the common-gate/common-base transistor stacked above it — the voltage swing across that transistor's own Cgd or Cbc collapses to almost nothing, even while the overall two-transistor stage still delivers full gain to the next node downstream. Less local swing across the same physical capacitor means less multiplied charge, which means less effective capacitance, which is exactly what preserves bandwidth.
That instinct is only true for a capacitor sitting quietly between a node and a fixed voltage. It breaks down the moment that capacitance bridges the input and output of an inverting, gain-providing stage. Through Miller multiplication, a genuinely tiny physical feedback capacitance — a few picofarads — presents an effective input capacitance many times larger, scaled roughly by 1 plus the stage's voltage gain magnitude. For a high-gain stage, that multiplied capacitance is very often the single dominantbandwidth-limiting element in the entire circuit — not a rounding error buried under other parasitics. That's exactly why real high-frequency circuit design leans on specific countermeasures: cascode stages to hold the local gain across the feedback capacitance near unity, and deliberate gain distribution across multiple lower-gain stages rather than one very-high-gain stage, both aimed squarely at keeping Miller multiplication from eating the bandwidth budget.
Explains why a small feedback capacitance bridging the input and output of an inverting, gain-providing amplifier stage — a MOSFET's Cgd, a BJT's Cbc, or an intentional compensation capacitor — appears, from the input's point of view, multiplied by roughly one plus the stage's voltage gain magnitude, and why that Miller-multiplied capacitance is often the dominant limit on an amplifier's high-frequency bandwidth.
A capacitance measured in single-digit picofarads sounds negligible next to the load capacitances, trace capacitances, and PCB parasitics engineers budget for elsewhere, so it's tempting to write it off. That reasoning holds for a capacitor between a node and a fixed reference. It fails for a capacitor bridging an inverting amplifier's input and output, because that capacitor's far terminal isn't fixed — it swings by the stage's full output voltage, in the opposite direction from the input. The resulting charge demand, and therefore the effective capacitance seen at the input, scales with the stage's own voltage gain, which is exactly what makes a 'tiny' parasitic dominate the bandwidth of a high-gain stage.
For an inverting stage with voltage gain −Av and a feedback capacitance Cf between output and input, an input voltage step ΔVin produces an output step of −Av·ΔVin. The total voltage swing across Cf is therefore ΔVin·(1+Av), so the charge Cf must supply for that same ΔVin is (1+Av) times what an ordinary grounded capacitor of the same value would need. Referred entirely to the input node, that behaves identically to a single capacitor of value C_miller = Cf·(1+|Av|) from the input to ground. A smaller, secondary Miller capacitance also appears at the output, roughly Cf·(1+1/|Av|), which for large |Av| is close to Cf itself and usually far less significant than the input-side term.
Combined with whatever source resistance drives the amplifier's input, C_miller forms a single-pole low-pass filter with cutoff fc = 1/(2π·Rs·C_miller) — and because C_miller grows with the stage's own gain, a higher-gain stage generally has a lower high-frequency cutoff from the exact same physical Cf. This is precisely why high-frequency amplifier and RF designs reach for cascode configurations: stacking a common-gate or common-base stage on top of the input device holds the local voltage gain across that device's own Cgd or Cbc close to unity, collapsing the Miller multiplier from (1+|Av|) down to roughly 2 and largely restoring the bandwidth the parasitic capacitance would otherwise have destroyed. The same physics is also exploited on purpose in 'Miller compensation,' where a deliberately placed feedback capacitor creates a controlled dominant low-frequency pole to stabilize a multi-stage op-amp.
The multiplication toward a large positive effective capacitance specifically requires an inverting, gain-providing stage — the sign flip between input and output is what makes the two ends of the feedback capacitor swing in opposite directions and add together rather than partially cancel. A non-inverting stage produces a very different (and generally much smaller, sometimes negative) input-referred impedance from the same feedback element.
Referred to the input, C_miller(in) ≈ Cf·(1+|Av|), where Cf is the physical feedback capacitance and |Av| is the magnitude of the stage's voltage gain at the frequency of interest. A smaller secondary term also appears at the output, C_miller(out) ≈ Cf·(1+1/|Av|), which approaches Cf itself for large |Av| and is usually a minor contributor next to the load capacitance already there.
A cascode still delivers the full, high overall voltage gain of the two-transistor stage — it just relocates where that gain actually appears. The input transistor's own drain (or collector) is held nearly constant by the low input impedance of the common-gate/common-base transistor stacked above it, so the local voltage swing across the input transistor's own Cgd or Cbc collapses to almost nothing, even though the combined stage still hands off substantial gain to the next node. You get high gain and the bandwidth of a low-gain stage at the same time.
No — it is deliberately exploited in "Miller compensation," a common op-amp frequency-compensation technique where a small capacitor is placed across a high-gain internal stage specifically to create a large, controlled, low-frequency dominant pole. That pole is what gives many op-amps their well-behaved, single-pole rolloff and unconditional stability, at the cost of the same bandwidth reduction that makes the effect a problem elsewhere.
It helps the same low-pass filter in the same way, since cutoff frequency is fc = 1/(2π·Rs·C_miller) — halving Rs doubles fc just as effectively as halving C_miller would. In practice, both levers get used together: a low-impedance driving stage plus a cascode (or reduced local gain) attacks both halves of the same RC time constant.
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