This simulator models a generic four-cell series battery pack's management system: cell-voltage sense taps and a thermistor harness feeding a cell-monitor board, a four-terminal Kelvin current shunt, a DC contactor that only closes after its precharge resistor has charged the downstream DC-link capacitor, a service disconnect and fuse, and a latched protection chain covering overcurrent, over/under-cell-voltage, thermal trip and open-sense-wire conditions.
• A real-time 3D cutaway of the pack and its protection hardware — cell module and vented cans, welded busbars, the cell-monitor/BMS circuit board, the cell-voltage and thermistor sense harness, the DC contactor with precharge branch, a DC cartridge fuse, a four-terminal Kelvin current shunt, a service disconnect with touch guards, the precharge resistor/DC-link capacitor, and the protected DC output — with toggleable enclosure, auto-rotate, exploded view and selectable, labeled components. • Seven controls: initial SOC for a new trial, pack current from −6 A (charge) to +12 A (discharge), ambient temperature, initial cell SOC spread (0–50 percentage points of mismatch), an injected-condition selector (healthy / open cell-sense wire / cell 1 high resistance), an adjustable overcurrent threshold (4–15 A) and an adjustable thermal trip threshold (40–70°C). • Live readouts for lowest cell voltage, highest cell voltage, pack current, downstream DC-link voltage, module temperature and mean SOC. • Time controls: pause/run, advance 1 s, advance 60 s, and a playback selector from real time up to 1 hour per second, plus enable-pack, open-contactor, clear-fault and reset-protection actions. • An Operating sequence readout, a switch-state panel and a per-cell voltage/SOC readings table. • An Analysis tab with cell-voltage and current-history charts, the underlying per-cell OCV/precharge model equations, and snapshot measurements. • A Tests tab with four guided experiments (normal connection, open sense lead, overcurrent, weak-cell cutoff), a Verification bench of automated model checks, and a timestamped event log with report export. • A Learn tab with four lessons (monitor individual cells, precharge first, debounce and latch, diagnose before resetting), a knowledge-check quiz and a written model-scope statement with references.
Closing a low-resistance main contactor directly onto an uncharged downstream DC-link capacitor would draw a large uncontrolled inrush current. Instead, the modeled 20 Ω precharge resistor first charges the 6 mF DC-link capacitor along Vdc(t) = Vpack·(1 − exp(−t/RC)); only once the sensed DC-link voltage reaches 90% of pack voltage does the BMS command the main contactor to close, at which point the low-resistance path safely takes over.
The simulator's "Normal connection" experiment lets you watch this sequence directly: the DC link rises through the precharge curve, and the main contactor closes exactly at the 90% threshold, not before.
Each series cell is tracked individually — Vcell,i = OCV(SOCi) − I·Ri — because a normal-looking total pack voltage can hide one cell that has drifted outside safe limits while the others compensate the sum. Analog threshold conditions (overcurrent, over/under-voltage, over-temperature) must persist for a 0.2 s debounce window before this teaching model latches a trip, while a diagnostic condition like an open sense wire trips immediately since it represents a loss of measurement integrity, not an analog threshold crossing.
Once latched, the trip opens the main contactor and inhibits pack output, but it does not by itself fix anything: the "Open sense lead" and "Overcurrent" experiments both show output going to zero and staying latched until you use the clear-fault and reset-protection actions — modeling the real-world requirement to diagnose and clear a fault before attempting to re-close. This is a teaching model with generic thresholds, delays and precharge values; it does not model fuse clearing physics, contact bounce, arc physics, insulation monitoring or redundant functional-safety architectures.
The main contactor only closes after a 20 Ω precharge resistor has charged the downstream 6 mF DC-link capacitor to at least 90% of the measured pack voltage. This prevents the large uncontrolled inrush current that would occur if a low-resistance contact closed directly onto an uncharged capacitive load.
No. The simulator tracks each series cell individually because one weak or high-resistance cell can sit outside safe limits while the pack sum still looks normal. That is why the lowest-cell and highest-cell voltage readouts are shown separately from the pack-level measurements.
An open cell-sense wire is a diagnostic fault representing lost measurement integrity, so it latches a trip immediately. Overcurrent, over/under-voltage and over-temperature are analog threshold conditions that must persist for a 0.2 s debounce window in this teaching model before they latch a trip.
This is a teaching model of four generic series cells with fixture-level thresholds, delays and precharge values. It does not model fuse time-current clearing behavior, contactor contact bounce, arc physics, insulation monitoring or redundant functional-safety architectures.