This simulator models an addressable Signaling Line Circuit (SLC) — a panel polling six individually addressed devices (detectors, a monitor and an output module) around a wired loop — as a connectivity graph with a deterministic poll cycle. Switch between return-loop and radial topology, inject conductor faults or a duplicate-address conflict, and watch which devices remain reachable and how the poll sequence responds.
• Equipment laboratory tab: a real-time 3D cutaway workbench of the SLC controller, the outgoing/return conductor pair, six addressed devices (detector at address 01, monitor at 02, an isolated fault zone at address 03, detector at 04, output module at 05, detector at 06) and the short-circuit isolators, with Home view, Focus selected part, Show full enclosure / Exploded view toggle, Auto rotate, Expand and Hide/show labels camera controls, a clickable numbered component list with callouts, live stats, a 'What is happening?' sequence narrative, switch-state tokens and a per-device readings table, plus an experiment control desk with Pause/Advance 0.1 s/Advance 1 s stepping, a playback-speed selector (real time, 10× slow motion, 10× faster, 1 minute per second), Start trial/Stop equipment actions, and controls for circuit topology (return loop vs. radial branch), fault (healthy / open conductor segment / short at device 3 / ground-fault indication), which device the open segment precedes, isolating the shorted device 3 on both sides, injecting a duplicate-address conflict, and the per-device poll period (0.1-2 s). • Curves & measurements tab: a primary-measurements chart (online vs. offline device counts), a response/sequence chart (successful responses vs. current poll address), the model equations, and snapshot measurement readouts. • Experiments tab: guided experiments (healthy loop, radial open, return-loop open, isolated short) each with an expected outcome, a Run model checks button that runs the built-in verification suite against independent fresh models, and a timestamped event log with a Prepare trial report export. • Learn & assess tab: lesson content on addressing, wiring vs. identity, opening a segment and isolating a short, a knowledge-check quiz with reset, and a scope/references note linking to an external addressable SLC installation guide.
An addressable Signaling Line Circuit lets one panel individually poll many devices over a shared pair of conductors, cycling through each address at a fixed interval — in this model, a nominal six-device scan equals six times the poll interval. Reachability is modeled as a graph search outward from the panel: in radial topology, an open conductor segment isolates every device beyond the break, because there is only one path out to them. In return-loop topology, the same conductor pair also runs back to the panel from the far end, so a single open segment still leaves every device reachable from the other direction — though the system still indicates trouble.
A short circuit is a different kind of fault: because a return path re-connects the loop around an open, it does not by itself clear a short. Isolators placed on both sides of the shorted device (address 03 in this model) are needed to remove just that faulted section from the circuit, after which the remaining healthy devices stay reachable through the rest of the loop. The simulator also demonstrates that physical reachability and device identity are separate concerns: a duplicate-address conflict can leave a device electrically connected yet unable to produce an unambiguous response.
The online/offline device counts and the reachable-nodes metric come directly from the graph-search model: 'Reachable nodes = graph search from panel,' so any device with no surviving path to the panel shows as unavailable regardless of whether the fault is an open or an isolated short. Successful responses count only reachable, unambiguous polls — a duplicate-address conflict can make a device reachable yet still fail to contribute a clean response, which is exactly what the 'conflict' metric flags separately from raw connectivity.
The Run model checks button exercises independent, freshly-built connectivity models — separate from your current trial — to confirm the graph-search and isolation logic behaves consistently across topologies and fault types, not just for your current settings. This is an abstract connectivity and deterministic-polling model, not a proprietary SLC communication protocol, a cable-loading calculation, or a Class A/Class X compliance claim for any specific manufacturer's system.
It models a six-device addressable Signaling Line Circuit as a connectivity graph with a deterministic poll cycle, letting you compare return-loop and radial topology under open, short, ground-fault and duplicate-address conditions. It is a representative educational sequence, not a proprietary SLC protocol or a Class A/X compliance claim.
In radial topology there is only one path from the panel to each device, so an open segment isolates everything downstream of the break. In return-loop topology the conductors also run back to the panel, giving a second path — so the same open segment leaves every device reachable, though trouble is still indicated.
No. A return path only restores connectivity around an open segment. A short circuit needs isolators on both sides of the faulted device to physically remove that section from the loop; the healthy remainder then stays reachable through whatever topology remains.
The Run model checks button runs the shared checks.js verification suite against independent, freshly built connectivity models — separate from your live trial — confirming the graph-search reachability and isolation logic hold consistently across topologies and fault types.