📈 LTspice Tutorial: Free SPICE Circuit Simulation

What LTspice Is

LTspice is a free SPICE-based circuit simulator originally developed by Linear Technology and now maintained by Analog Devices after its acquisition of Linear Technology. SPICE (Simulation Program with Integrated Circuit Emphasis) itself dates back to the University of California, Berkeley in the early 1970s, built as a way to mathematically predict how a circuit behaves before committing it to physical hardware. LTspice's specific appeal is that it packages real SPICE simulation into a fast, genuinely free tool with an enormous built-in library of real op-amp, regulator, and power-management device models drawn from the Analog Devices/Linear Technology catalog — which is a major reason it remains the go-to free tool for analog and power electronics designers despite commercial alternatives like PSpice existing.

Building Your First Schematic

LTspice's schematic editor works the way any schematic capture tool does: you place component symbols (resistors, capacitors, voltage and current sources, diodes, transistors, op-amps) and wire them together visually. A few habits matter especially early on. Every simulation needs exactly one node explicitly marked as ground (SPICE's node 0), placed using the ground symbol — a circuit with no ground reference is one of the most common reasons a new simulation fails outright or produces meaningless results, since SPICE measures every voltage relative to that single reference point. Component values are entered directly on the schematic (a resistor's ohms, a capacitor's farads), and LTspice accepts standard unit suffixes like k (kilo), u (micro), n (nano), and p (pico) rather than requiring full scientific notation.

Under the hood, LTspice is generating a SPICE netlist from your schematic automatically — you rarely need to write one by hand — but that netlist is always viewable and directly editable when you need finer control over a specific simulation parameter or a directive the schematic editor doesn't expose directly.

Running the Core Simulation Types

Simulation behavior in LTspice is controlled by directives (SPICE commands like .tran, .ac, .dc) placed on the schematic, most easily added through LTspice's simulation command menu rather than typed from memory, which also avoids the syntax mistakes that trip up beginners.

Transient Analysis (.tran)

Transient analysis simulates how the circuit behaves over time, which is the right choice for watching a switching regulator's output ripple settle, observing a filter's step response, or seeing an oscillator actually oscillate. A basic transient directive specifies a stop time, for example .tran 10m to simulate 10 milliseconds of circuit behavior, and the results plot as familiar time-domain waveforms.

AC Analysis (.ac)

AC analysis linearizes the circuit around its DC operating point and sweeps frequency to produce Bode plots of gain and phase — the standard tool for characterizing an amplifier's frequency response or a filter's cutoff behavior. A typical directive looks like .ac dec 100 1 1meg, sweeping decade by decade with 100 points per decade from 1 Hz to 1 MHz.

DC Sweep (.dc)

DC sweep analysis steps a source's value across a specified range and solves the DC operating point at each step, which is useful for plotting a transistor's characteristic curves or checking how an output voltage responds as an input or supply voltage varies. A directive like .dc V1 0 5 0.1 sweeps source V1 from 0 to 5 volts in 0.1-volt steps.

Reading and Interpreting Simulation Waveforms

After running a simulation, LTspice opens a waveform viewer where clicking on a wire, pin, or component probes that node's voltage or current directly. Multiple traces can be overlaid on the same plot, and cursors let you measure specific values — rise time, overshoot, ripple amplitude, phase margin — directly off the plotted waveform rather than eyeballing it. You can also plot derived expressions (like the difference between two node voltages, or a computed power dissipation) rather than only raw simulated quantities, which is useful for checking things SPICE doesn't output directly, like instantaneous power across a switching device.

Catching a Design Error Before You Build the Physical Circuit

The practical payoff of all this is straightforward: simulating a design in LTspice lets you catch mistakes — an unstable feedback loop that oscillates instead of settling, a transistor biased into the wrong operating region, a filter with a cutoff frequency an order of magnitude off from intended — while changes cost nothing more than editing a value and re-running the sweep. Finding the same problem after a physical board has been etched, populated, and brought up on the bench is far more expensive in both time and money, which is exactly why simulating first in LTspice (or a comparable SPICE tool) before committing a design to a PCB is standard practice among analog and power electronics designers, a workflow covered in more depth alongside PCB layout tools in the companion PCB & EDA software comparison article on this site.

Common Beginner Mistakes

• Missing ground reference — every simulation needs exactly one node explicitly tied to ground (node 0); a floating circuit with no ground symbol placed will fail to simulate or give nonsensical results.
• Wrong simulation directive syntax — a mistyped or malformed .tran, .ac, or .dc command (wrong argument order, missing units) is a frequent source of confusing errors; using LTspice's built-in simulation command dialog rather than typing directives from memory avoids most of these.
• Wrong unit suffixes on component values — confusing m (milli) with meg (mega) is a classic mistake, since SPICE's unit convention differs from everyday scientific notation shorthand.
• Convergence failures on genuinely unstable circuits — an oscillating feedback loop or a poorly modeled nonlinear device can cause the solver to struggle or fail outright, which is sometimes a simulator setting issue but is often the simulation correctly telling you the real circuit would actually be unstable too.