PLC architecture, CPU and memory, the scan cycle, program execution order, hardware form factors, redundancy, and safety PLCs — how a programmable controller actually works underneath the logic you write in Module 4.
Ladder logic, function block diagram, and every other IEC 61131-3 language are just different views into the same execution engine, and this module builds that engine from the ground up: what the CPU, power supply, I/O modules, and backplane each actually do, how program memory and data memory differ, and the four-phase scan cycle — input scan, program execution, output scan, housekeeping — that explains nearly every behavior in a running PLC that looks strange the first time you see it.
By the end of this module you should be able to explain why the program never reads a physical input directly, what makes a hot-standby CPU failover bumpless, and why a safety PLC's certified dual-channel architecture can never be substituted with careful programming on a standard PLC — a distinction Module 12 (Industrial Safety) builds a full safety-system design on top of.